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FAST CMOS 16-BIT LATCHED TRANSCEIVER
Integrated Device Technology, Inc.
IDT54/74FCT16543T/AT/CT/ET IDT54/74FCT162543T/AT/CT/ET
FEATURES:
* Common features: - 0.5 MICRON CMOS Technology - High-speed, low-power CMOS replacement for ABT functions - Typical tSK(o) (Output Skew) < 250ps - Low input and output leakage 1A (max.) - ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) - Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack - Extended commercial range of -40C to +85C - VCC = 5V 10% * Features for FCT16543T/AT/CT/ET: - High drive outputs (-32mA IOH, 64mA IOL) - Power off disable outputs permit "live insertion" - Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25C * Features for FCT162543T/AT/CT/ET: - Balanced Output Drivers: 24mA (commercial), 16mA (military) - Reduced system switching noise - Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V,TA = 25C
DESCRIPTION:
The FCT16543T/AT/CT/ET and FCT162543T/AT/CT/ET 16-bit latched transceivers are built using advanced dual metal CMOS technology. These high-speed, low-power devices are organized as two independent 8-bit D-type latched transceivers with separate input and output control to permit independent control of data flow in either direction. For example, the Ato-B Enable (xCEAB) must be LOW in order to enter data from the A port or to output data from the B port. xLEAB controls the latch function. When xLEAB is LOW, the latches are transparent. A subsequent LOW-to-HIGH transition of xLEAB signal puts the A latches in the storage mode. xOEAB performs output enable function on the B port. Data flow from the B port to the A port is similar but requires using xCEBA, xLEBA, and xOEBA inputs. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT16543T/AT/CT/ET are ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers. The FCT162543T/AT/CT/ET have balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall times-reducing the need for external series terminating resistors. The FCT162543T/AT/CT/ET are plug-in replacements for the FCT16543T/AT/CT/ET and 54/74ABT16543 for on-board bus interface applications.
FUNCTIONAL BLOCK DIAGRAM
1OEBA 1CEBA 1LEBA 1OEAB 1CEAB 1LEAB
2OEBA 2CEBA 2LEBA 2OEAB 2CEAB 2LEAB
C
1A1
2A1
C
1B1
D C D
D C D
2B1
TO 7 OTHER CHANNELS
2618 drw 01
TO 7 OTHER CHANNELS
2618 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
(c)1996 Integrated Device Technology, Inc.
SEPTEMBER 1996
DSC-2618/7
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IDT54/74FCT16543T/AT/CT/ET, 162543T/AT/CT/ET FAST CMOS 16-BIT LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
1OEAB 1LEAB 1CEAB
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
56 55 54 53 52 51 50 49 48 47 46 45 44 SO56-1 43 SO56-2 SO56-3 42 41 40 39 38 37 36 35 34 33 32 31 30 29
1OEBA 1LEBA 1CEBA
1OEAB 1LEAB 1CEAB
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 E56-1
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
2618 drw 04
1OEBA 1LEBA 1CEBA
GND
1A1 1A2
GND
1B1 1B2
GND
1A1 1A2
GND
1B1 1B2
VCC
1A3 1A4 1A5
VCC
1B3 1B4 1B5
VCC
1A3 1A4 1A5
VCC
1B3 1B4 1B5
GND
1A6 1A7 1A8 2A1 2A2 2A3
GND
1B6 1B7 1B8 2B1 2B2 2B3
GND
1A6 1A7 1A8 2A1 2A2 2A3
GND
1B6 1B7 1B8 2B1 2B2 2B3
GND
2A4 2A5 2A6
GND
2B4 2B5 2B6
GND
2A4 2A5 2A6
GND
2B4 2B5 2B6
VCC
2A7 2A8
VCC
2B7 2B8
VCC
2A7 2A8
VCC
2B7 2B8
GND
2CEAB 2LEAB 2OEAB
GND
2CEBA 2LEBA 2OEBA
GND
2CEAB 2LEAB 2OEAB
GND
2CEBA 2LEBA 2OEBA
SSOP/ TSSOP/TVSOP TOP VIEW
2618 drw 03
CERPACK TOP VIEW
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IDT54/74FCT16543T/AT/CT/ET, 162543T/AT/CT/ET FAST CMOS 16-BIT LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names xOEAB xOEBA xCEAB xCEBA xLEAB xLEBA xAx xBx Description A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Enable Input (Active LOW) B-to-A Enable Input (Active LOW) A-to-B Latch Enable Input (Active LOW) B-to-A Latch Enable Input (Active LOW) A-to-B Data Inputs or B-to-A 3-State Outputs B-to-A Data Inputs or A-to-B 3-State Outputs
2618 tbl 01
FUNCTION TABLE(1, 2)
For A-to-B (Symmetric with B-to-A)
Inputs xCEAB xLEAB CEAB LEAB H X L L L L X H L H L H xOEAB OEAB X X L L H H Latch Status xAx to xBx Storing Storing Transparent Storing Transparent Storing Output Buffers xBx High Z X Current A Inputs Previous* A Inputs High Z High Z
NOTES: 2618 tbl 02 1. * Before xLEAB LOW-to-HIGH Transition H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care 2. A-to-B data flow shown; B-to-A flow control is the same, except using xCEBA, x LEBA and xOEBA.
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description Max. VTERM(2) Terminal Voltage with Respect to -0.5 to +7.0 GND VTERM(3) Terminal Voltage with Respect to -0.5 to GND VCC +0.5 TSTG Storage Temperature -65 to +150 IOUT DC Output Current -60 to +120 Unit V V C mA
CAPACITANCE (TA = +25C, f = 1.0MHz)
Symbol Parameter(1) CIN Input Capacitance CI/O I/O Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 3.5 Max. Unit 6.0 pF 8.0 pF
2618 lnk 04
NOTE: 1. This parameter is measured at characterization but not tested.
NOTES: 2618 lnk 03 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXXT Output and I/O terminals. 3. Output and I/O terminals for FCT162XXXT.
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IDT54/74FCT16543T/AT/CT/ET, 162543T/AT/CT/ET FAST CMOS 16-BIT LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Commercial: TA = -40C to +85C, VCC = 5.0V 10%; Military: TA = -55C to +125C, VCC = 5.0V 10%
Symbol VIH VIL II H II L IOZH IOZL VIK IOS VH ICCL ICCH ICCZ Parameter Input HIGH Level Input LOW Level Input HIGH Current (Input pins)(5) Input HIGH Current (I/O pins)(5) Input LOW Current (Input pins)(5) VCC = Max. VCC = Min., IIN = -18mA VCC = Max., VO = GND (3)
--
Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VI = VCC VI = GND VO = 2.7V VO = 0.5V
Min. 2.0 -- -- -- -- -- -- -- -- -80 -- --
Typ.(2) --
-- -- -- -- -- -- -- -0.7 -140
Max.
--
Unit V V A
0.8 1 1 1 1 1 1
-1.2 -225 --
Input LOW Current (I/O pins)(5) High Impedance Output Current (3-State Output pins) (5) Clamp Diode Voltage Short Circuit Current Input Hysteresis Quiescent Power Supply Current
A V mA mV A
100 5
VCC = Max., VIN = GND or VCC
500
2618 lnk 05
OUTPUT DRIVE CHARACTERISTICS FOR FCT16543T
Symbol IO VOH Parameter Output Drive Current Output HIGH Voltage Test Conditions(1) VCC = Max., VO = 2.5V(3) VCC = Min. VIN = VIH or VIL IOH = -3mA IOH = -12mA MIL. IOH = -15mA COM'L. IOH = -24mA MIL. IOH = -32mA COM'L.(4) VCC = Min. IOL = 48mA MIL. VIN = VIH or VIL IOL = 64mA COM'L. VCC = 0V, VIN or VO 4.5V Min. -50 2.5 2.4 2.0 -- -- Typ.(2)
--
Max.
-180
Unit mA V V V V A
2618 lnk 06
3.5 3.5 3.0 0.2 --
-- -- -- 0.55 1
VOL IOFF
Output LOW Voltage Input/Output Power Off Leakage(5)
OUTPUT DRIVE CHARACTERISTICS FOR FCT162543T
Symbol IODL IODH VOH VOL Parameter Output LOW Current Output HIGH Current Output HIGH Voltage Output LOW Voltage Test Conditions(1) VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V (3) VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3) VCC = Min. VIN = VIH or VIL VCC = Min. VIN = VIH or VIL IOH = -16mA MIL. IOH = -24mA COM'L. IOL = 16mA MIL. IOL = 24mA COM'L. Min. 60 -60 2.4 -- Typ.(2) 115 -115 3.3 0.3 Max. 200 -200 -- 0.55 Unit mA mA V V
2618 lnk 07
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. Duration of the condition can not exceed one second. 5. The test limit for this parameter is 5A at TA = -55C.
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IDT54/74FCT16543T/AT/CT/ET, 162543T/AT/CT/ET FAST CMOS 16-BIT LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) Test Conditions(1) VCC = Max. VIN = 3.4V(3) VCC = Max., Outputs Open xCEAB and xOEAB = GND xCEBA = VCC One Input Toggling 50% Duty Cycle VCC = Max., Outputs Open fi = 10MHz 50% Duty Cycle xLEAB, xCEAB and xOEAB= GND xCEBA = VCC One Bit Toggling VCC = Max., Outputs Open fi = 2.5MHz 50% Duty Cycle xLEAB, xCEAB and xOEAB= GND xCEBA = VCC Sixteen Bits Toggling VIN = VCC VIN = GND Min. -- -- Typ.(2) 0.5 60 Max. 1.5 100 Unit mA A/ MHz
IC
Total Power Supply Current(6)
VIN = VCC VIN = GND
--
0.6
1.5
mA
VIN = 3.4V VIN = GND
--
0.9
2.3
VIN = VCC VIN = GND
--
2.4
4.5(5)
VIN = 3.4V VIN = GND
--
6.4
16.5(5)
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi
2618 tbl 08
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IDT54/74FCT16543T/AT/CT/ET, 162543T/AT/CT/ET FAST CMOS 16-BIT LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT16543T/162543T Com'l. Symbol Parameter Condition(1) Min.(2) Max. Mil. Min.(2) Max. FCT16543AT/162543AT Com'l. Min.(2) Max. Mil. Min.(2) Max. Unit
Propagation Delay Transparent Mode xAx to xBx or xBx to xAx tPLH Propagation Delay tPHL xLEBA to xAx, xLEAB to xBx tPZH Output Enable Time tPZL xOEBA or xOEAB to xAx or xBx xCEBA or xCEAB to xAx or xBx tPHZ Output Disable Time tPLZ xOEBA or xOEAB to xAx or xBx xCEBA or xCEAB to xAx or xBx tSU Set-up Time HIGH or LOW xAx or xBx to xLEAB or xLEBA tH Hold Time HIGH or LOW xAx or xBx to xLEAB or xLEBA tW xLEBA or xLEAB Pulse Width LOW tSK(o) Output Skew (3)
tPLH tPHL
CL = 50pF RL = 500
1.5
8.5
1.5
10.0
1.5
6.5
1.5
7.5
ns
1.5 1.5
12.5 12.0
1.5 1.5
14.0 14.0
1.5 1.5
8.0 9.0
1.5 1.5
9.0 10.0
ns ns
1.5
9.0
1.5
13.0
1.5
7.5
1.5
8.5
ns
3.0 2.0 5.0 --
-- -- -- 0.5
3.0 2.0 5.0 --
-- -- -- 0.5
2.0 2.0 5.0 --
-- -- -- 0.5
2.0 2.0 5.0 --
-- -- -- 0.5
ns ns ns ns
2618 tbl 09
FCT16543CT/162543CT Com'l. Symbol Parameter Condition(1) Min.(2) Max. Mil. Min.(2) Max.
FCT16543ET/162543ET Com'l. Min.(2) Max. Mil. Min.(2) Max. Unit
Propagation Delay Transparent Mode xAx to xBx or xBx to xAx tPLH Propagation Delay tPHL xLEBA to xAx, xLEAB to xBx tPZH Output Enable Time tPZL xOEBA or xOEAB to xAx or xBx xCEBA or xCEAB to xAx or xBx tPHZ Output Disable Time tPLZ xOEBA or xOEAB to xAx or xBx xCEBA or xCEAB to xAx or xBx tSU Set-up Time, HIGH or LOW xAx or xBx to xLEBA or xLEAB tH Hold Time HIGH or LOW xAx or xBx to xLEBA or xLEAB tW xLEBA or xLEAB Pulse Width LOW tSK(o) Output Skew (3)
tPLH tPHL
CL = 50pF RL = 500
1.5
5.3
1.5
6.1
1.5
3.4
--
--
ns
1.5 1.5
7.0 8.0
1.5 1.5
8.0 9.0
1.5 1.5
3.7 4.8
-- --
-- --
ns ns
1.5
6.5
1.5
7.5
1.5
4.0
--
--
ns
2.0 2.0 5.0 --
-- -- -- 0.5
2.0 2.0 5.0 --
-- -- -- 0.5
1.0 1.0 3.0 (4) --
-- -- -- 0.5
-- -- -- --
-- -- -- --
ns ns ns ns
2618 tbl 10
NOTES: 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. 4. This limit is guaranteed but not tested.
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IDT54/74FCT16543T/AT/CT/ET, 162543T/AT/CT/ET FAST CMOS 16-BIT LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS
V CC 500 VIN Pulse Generator RT D.U.T. 50pF CL 500 VOUT 7.0V
SWITCH POSITION
Test Open Drain Disable Low Enable Low All Other Tests Open
DEFINITIONS: 2618 lnk 10 CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Switch
Closed
2618 drw 05
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tSU
tH
3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V
2618 drw 06
LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE
1.5V
tREM
1.5V
2618 drw 07
tSU
tH
PROPAGATION DELAY
3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V
2618 drw 08
ENABLE AND DISABLE TIMES
ENABLE DISABLE 3V 1.5V 0V 3.5V 0.3V tPHZ 0.3V 1.5V 0V VOH 0V
2618 drw 09
SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL
CONTROL INPUT tPZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH CLOSED tPZH SWITCH OPEN 3.5V 1.5V tPLZ
VOL
NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns
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IDT54/74FCT16543T/AT/CT/ET, 162543T/AT/CT/ET FAST CMOS 16-BIT LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT X FCT XXXX Device Temperature Type Range X Package X Process Blank B PV PA PF E Commercial MIL-STD-883, Class B Shrink Small Outline Package (SO56-1) Thin Shrink Small Outline Package (SO56-2) Thin Very Small Outline Package (SO56-3) CERPACK (E56-1)
16543T 16-Bit Latched Transceiver 16543AT 16543CT 16543ET 162543T 162543AT 162543CT 162543ET 54 74 -55C to +125C -40C to +85C
2618 drw 10
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